AT27C800 1 features ? read access time - 100 ns ? word-wide or byte-wide configurable ? 8-megabit flash and mask rom compatable ? low power cmos operation -100 m a maximum standby - 50 ma maximum active at 5 mhz ? wide selection of jedec standard packages - 42-lead 600 mil cerdip and pdip - 44-lead soic (sop) - 48-lead tsop (12 mm x 20 mm) ? 5v 10% power supply ? high reliability cmos technology - 2,000 esd protection - 200 ma latchup immunity ? rapid tm programming algorithm - 50 m s/word (typical) ? cmos and ttl compatible inputs and outputs ? integrated product identification code ? commercial and industrial temperature ranges description the AT27C800 is a low-power, high performance 8,388,608-bit uv erasable program- mable read only memory (eprom) organized as either 512k by 16 or 1024k by 8 bits. it requires a single 5v power supply in normal read mode operation. any word can be accessed in less than 100 ns, eliminating the need for speed-reducing wait states. the x16 organization makes this part ideal for high-performance 16- and 32-bit microprocessor systems. 0801a-a 8-megabit (512k x 16 or 1024k x 8) uv erasable eprom AT27C800 preliminary pin configurations pin name function a0 - a18 addresses o0 - o15 outputs o15/a-1 output/address byte /vpp byte mode/ program supply ce chip enable oe output enable nc no connect tsop type 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 a15 a14 a13 a12 a11 a10 a9 a8 nc nc nc nc nc nc nc a18 a17 a7 a6 a5 a4 a3 a2 a1 a16 byte/vpp gnd o15/a-1 o7 o14 o6 o13 o5 o12 o4 vcc o11 o3 o10 o2 o9 o1 o8 o0 oe gnd ce a0 cdip, pdip top view 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 ce gnd oe o0 o8 o1 o9 o2 o10 o3 o11 nc a8 a9 a10 a11 a12 a13 a14 a15 a16 byte/vpp gnd o15/a-1 o7 o14 o6 o13 o5 o12 o4 vcc soic (sop) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 nc a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 ce gnd oe o0 o8 o1 o9 o2 o10 o3 o11 nc nc a8 a9 a10 a11 a12 a13 a14 a15 a16 byte/vpp gnd o15/a-1 o7 o14 o6 o13 o5 o12 o4 vcc (continued)
AT27C800 2 the AT27C800 can be organized as either word-wide or byte-wide. the organization is selected via the byte /v pp pin. when byte /v pp is asserted high (v ih ), the word-wide organization is selected and the o15/a-1 pin is used for o15 data output. when byte /v pp is asserted low (v il ),the byte wide organization is selected and the o15/a-1 pin is used for the address pin a-1. when the AT27C800 is logi- cally regarded as x16 (word-wide), but read in the byte- wide mode, then with a-1=v il the lower eight bits of the 16 bit word are selected with a-1 =v ih the upper 8 bits of the 16-bit word are selected. in read mode, the AT27C800 typically consumes 15 ma. standby mode supply current is typically less than 10 m a . the AT27C800 is available in industry standard jedec- approved one-time programmable (otp)pdip, soic (sop), and tsop as well as uv erasable windowed cer- dip packages. the device features two-line control(ce ,oe ) to eliminate bus contention in high-speed systems. with high density 512k word or 1024k-bit storage capabil- ity, the AT27C800 allows firmware to be to be stored reli- ably and to be accessed by the system without the delays of mass storage media. atmels AT27C800 has additional features that ensure high quality and efficient production use. the rapid tm program- ming algorithm reduces the time required to program the part and guarantees reliable programming. programming time is typically only 50 m s/word. the integrated product identification code electronically identifies the device and manufacturer. this feature is used by industry standard programming equipment to select the proper programming equipment and voltages. erasure characteristics the entire memory array of the AT27C800 is erased (all outputs read as v oh ) after exposure to ultraviolet light at a wavelength of 2,537?. complete erasure is assured after a minimum of 20 minutes of exposure using 12,000 m w/cm 2 intensity lamps spaced one inch away from the chip. mini- mum erase time for lamps at other intensity ratings can be calculated from the minimum integrated erasure dose of 15 w . sec/cm 2 . to prevent unintentional erasure, an opaque label is recommended to cover the clear window on any uv erasable eprom that will be subjected to continuous flourescent indoor lighting or sunlight. system considerations switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. unless accommodated by the system design, these tran- sients may exceed data sheet limits, resulting in device non-conformance. at a minimum, a 0.1 m f high frequency, low inherent inductance, ceramic capacitor should be uti- lized for each device. this capacitor should be connected between the v cc and ground terminals of the device, as close to the device as possible. additionally, to stabilize the supply voltage level on printed circuit boards with large eprom arrays, a 4.7 m f bulk electrolytic capacitor should be utilized, again connected between the v cc and ground terminals. this capacitor should be positioned as close as possible to the point where the power supply is connected to the array. block diagram
AT27C800 3 absolute maximum ratings* temperature under bias ...................-55 c to +125 c *notice: stresses beyond those listed under absolute maximum ratings may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: 1. minimum voltage is -0.6v dc which may under- shoot to -2.0v for pulses of less than 20 ns. max- imum output pin voltage is vcc + 0.75v dc which may overshoot to + 7.0v for pulses of less than 20 ns. storage temperature ........................-65 c to +150 c voltage on any pin with with respect to ground.....................-2.0v to +7.0v (1) voltage on a9 with respect to ground .........................-2.0v to +14.0v (1) v pp supply voltage with respect to ground ..........................-2.0v to +14.0v (1) integrated uv erase dose............... 7258 w ?sec/cm 2 operating modes notes: 1. x can be v il or v ih. 2. refer to the programming characteristics tables in this data sheet. 3. v h = 12.0 0.5v. 4. two identifier words may be selected. all ai inputs are held low (v il ) except a9,which is set to v h , and a0, which is toggled low (v il ) to select the manufacturers identification word and high (v ih ) to select the device code word. 5. standby v cc current (i sb ) is specified with v pp = v cc . v cc > v pp will cause a slight increase in i sb . mode\pin ce oe ai byte /v pp outputs o 0 -o 7 o 8 -o 14 o 15 /a-1 read word-wide v il v il x (1) v ih d out d out d out read byte-wide upper v il v il x (1) v il d out high z v ih read byte-wide lower v il v il x (1) v il d out high z v il output disable x (1) v ih x (1) xhigh z standby v ih x (1) x (1) x (5) high z rapid program (2) v il v ih ai v pp d in pgm verify x v il ai v pp d out pgm inhibit v ih v ih x (1) v pp high z product identification (4) v il v il a9 = v h (3) a0 = v ih or v il a1 - a18 = v il v ih identification code
AT27C800 4 dc and operating characteristics for read operation notes: 1. v cc must be applied simultaneously or before v pp , and removed simultaneously or after v pp . 2. v pp may be connected directly to v cc except during programming. the supply current would then be the sum of i cc and i pp . symbol parameter condition min max units i li input load current v in = 0v to v cc 1.0 m a i lo output leakage current v out = 0v to v cc 5.0 m a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 m a i sb v cc (1) standby current i sb1 (cmos) ce = v cc 0.3v 100 m a i sb2 (ttl) ce = 2.0 to v cc + 0.5v 1.0 ma v cc active current f = 5mhz, i out = 0 ma, ce = v il 50 ma v il input low voltage -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.5 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = -400 ma 2.4 v dc and ac operating conditions for read operation AT27C800 -10 -12 -15 operating temperature (case) com. 0 c - 70 c0 c - 70 c0 c - 70 c ind. -40 c - 85 c -40 c - 85 c-40 c - 85 c v cc power supply 5v 10% 5v 10% 5v 10% ac characteristics for read operation notes: 2,3,4,5. see the ac waveforms for read operation diagram. symbol parameter condition AT27C800 units -10 -12 -15 min max min max min max t acc (3) address to output delay ce = oe = v il 100 120 150 ns t ce (2) ce to output delay oe = v il 100 120 150 ns t oe (2,3) oe to output delay ce = v il 40 40 50 ns t df (4,5) oe or ce high to output float, whichever occured first 30 35 40 ns t oh (4) output hold from address ce or oe , whichever occured first 5.0 5.0 5.0 ns t st byte high to output valid 100 120 150 ns t std byte low to output transition 40 50 60 ns
AT27C800 5 byte-wide read mode ac waveforms (1) note: 1. byte /v pp = v il byte transition ac waveforms notes: 1. timing measurement references are 0.8v and 2.0v. input ac drive levels are 0.45v and 2.4v, unless otherwise specified. 2. oe may be delayed up to t ce - t oe after the falling edge of ce without impact on t ce. 3. oe may be delayed up to t acc - t oe after the address is valid without impact on t acc . 4. this parameter is only sampled and is not 100% tested. 5. output float is defined as the point when data is no longer driven. a0 - a18 a-1 o-o 07 byte/v pp t acc t st t std t oh t oh o-o 815 hi-z valid valid data out data out data out byte-wide read mode ac waveforms (1) note: 1. byte /v pp = v ih
AT27C800 6 output test load note: 1. cl = 100 pf including jig capacitance. pin capaticance (f = 1 mhz, t = 25 v) (1) note: 1. typical values for nominal supply voltage. this parameter is only sampled and is not 100% tested. typ max units conditions c in 410pfv in = 0v c out 812pfv out = 0v input test waveforms and measurement levels t r , t f < 20 ns (10% to 90%)
AT27C800 7 programming waveforms (1) notes: 1. the input timing reference is 0.8v for v il and 2.0v for v ih . 2. t oe and t dfp are characteristics of the device but must be accommodated by the programmer. 3. when programming the AT27C800, a 0.1 m f capacitor is required across v pp and ground to suppress voltage transients. dc programming characteristics t a = 25 5c, v cc = 6.5 0.25v, v pp = 13.0 0.25v symbol parameter test conditions limits units min max i li input load current v in = v il , v ih 10 m a v il input low level -0.6 0.8 v v ih input high level 2.0 v cc + 0.5 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = -400 m a2.4 v i cc2 v cc supply current (program and verify) 50 ma i pp2 v pp supply current ce = v il 30 ma v id a9 product identification voltage 11.5 12.5 v
AT27C800 8 ac programming characteristics t a = 25 5c, v cc = 6.5 0.25v, v pp = 13.0 0.25v notes: 1. v cc must be applied simultaneously or before v pp and removed simultaneously or after v pp . 2. this parameter is only sampled and is not 100% tested. output float is defined as the point where data is no longer driven see timing diagram. 3. program pulse width tolerance is 50 m s 5%. symbol parameter test conditions (1) limits units min max t as address setup time input rise and fall times: (10% to 90%) 20 ns. input pulse levels: 45v to 2.4v input pulse levels: 0.8v to 2.0v input timing reference level: 0.8v to 2.0v output timing reference level: 0.8v to 2.0v 2 m s t oes oe setup time 2 m s t ds data setup time 2 m s t ah address hold time 0 m s t dh data hold time 2 m s t dfp oe high to output float delay (2) 0 130 ns t vps v pp setup time 2 m s t vcs v cc setup time 2 m s t pw ce program pulse width (3) 47.5 52.5 m s t oe data valid from oe 150 ns t prt byte /v pp pulse rise time during programming 50 ns atmels 27c800 integrated product identification code codes pins hex data a0 015 014 013 012 011 010 09 08 07 06 05 04 03 02 01 00 manufacturer 000011110 1e1e device type 111111000 f8f8
AT27C800 9 rapid programming algorithm a 50 m s ce pulse width is used to program. the address is set to the first location. v cc is raised to 6.5v and byte /v pp is raised to 13.0v. each address is first programmed with one 50 m s ce pulse without verification. then a verification/ reprogramming loop is executed for each address. in the event a word fails to pass verification, up to 10 successive 50 m s pulses are applied with a verification after each pulse. if the word fails to verify after 10 pulses have been applied, the part is considered failed. after the word verifies properly, the next address is selected until all have been checked. v pp is then lowered to 5.0v and v cc to 5.0v. all words are read again and compared with the original data to determine if the device passes or fails.
AT27C800 10 ordering information t acc (ns) i cc (ma) ordering code package operation range active standby 100 50 0.1 AT27C800-10dc AT27C800-10pc AT27C800-10rc AT27C800-10tc 42dw6 42p6 44r 48t commercial (0 c to 70 c) 50 0.1 AT27C800-10di AT27C800-10pi AT27C800-10ri AT27C800-10ti 42dw6 42p6 44r 48t industrial (-40 c to 85 c) 120 50 0.1 AT27C800-12dc AT27C800-12pc AT27C800-12rc AT27C800-12tc 42dw6 42p6 44r 48t commercial (0 c to 70 c) 50 0.1 AT27C800-12di AT27C800-12pi AT27C800-12ri AT27C800-12ti 42dw6 42p6 44r 48t industrial (-40 c to 85 c) 150 50 0.1 AT27C800-15dc AT27C800-15pc AT27C800-15rc AT27C800-15tc 42dw6 42p6 44r 48t commercial (0 c to 70 c) 50 0.1 AT27C800-15di AT27C800-15pi AT27C800-15ri AT27C800-15ti 42dw6 42p6 44r 48t industrial (-40 c to 85 c) package type 42dw6 42 lead, 0.600" wide, ceramic dual inline package (cdip) 42p6 42 lead, 0.600" wide, plastic dual inline package (pdip) 44r 44 lead, 0.525" wide, plastic gull wing small outline package (soic/sop) 48t 48 lead, plastic thin small outline package (tsop) 12 x 20 mm
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